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Part Number | S-13R1G12-A4T2U3 |
OEMstron Part # | S-13R1G12-A4T2U3 |
Manufacturer | ABLIC |
Category | Semiconductors › Power Management ICs › Voltage Regulators - Linear |
Description | IC REG LINEAR 1.2V 150MA HSNT4-B |
Lifecycle | Not For New Designs |
RoHS | No RoHS Information |
EDA/CAD Models | S-13R1G12-A4T2U3 PCB Footprint and Symbol |
Warehouses | USA, Europe, China, Hong Kong SAR |
Estimated Delivery | Dec 6 - Dec 11 (Choose Expedited Shipping) |
Warranty | Up to 1 year [Limited-Warranty]* |
Payment | |
Shipping |
S-13R1G12-A4T2U3 Specifications
Part Number | S-13R1G12-A4T2U3 | |
Brand | ABLIC | |
Lifecycle | Not For New Designs | |
RoHS | No RoHS Information | |
Product Line | Semiconductors | |
Category | Power Management ICs | |
Subcategory | Voltage Regulators - Linear | |
Manufacturer | ABLIC U.S.A. Inc. | |
Series | S-13R1 | |
Output Configuration | Positive | |
Output Type | Fixed | |
Number of Regulators | 1 | |
Voltage - Input (Max) | 5.5V | |
Voltage - Output (Min/Fixed) | 1.2V | |
Voltage - Output (Max) | - | |
Voltage Dropout (Max) | 0.88V @ 100mA | |
Current - Output | 150mA | |
Current - Quiescent (Iq) | 1µA | |
Current - Supply (Max) | 9µA | |
PSRR | 70dB (1kHz) | |
Control Features | Enable | |
Protection Features | Overcurrent, Reverse Current, Thermal Shutdown | |
Operating Temperature | -40°C ~ 85°C (TA) | |
Mounting Type | Surface Mount | |
Package / Case | 4-SMD, Flat Lead Exposed Pad | |
Supplier Device Package | HSNT-4-B |
S-13R1G12-A4T2U3 Documents
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Global Supply Chains - Reliable and Authorized Distributor Resources
Part Number | Description | Stock |
S-13R1G12-A4T2U3 D# S-13R1G12-A4T2U3 ABLIC Inc |
- Tape and Reel (Alt: S-13R1G12-A4T2U3) RoHS: Compliant
|
Americas - 0 |
Part Number | Description | Stock |
S-13R1G12-A4T2U3 D# S-13R1G12-A4T2U3-ND ABLIC Inc |
IC REG LINEAR 1.2V 150MA HSNT4-B |
Limited Supply - Call |
Part Number | Description | Stock |
S-13R1G12-A4T2U3 ABLIC Inc |
RoHS: Compliant
|
0 |
Part Number | Description | Stock |
S-13R1G12-A4T2U3 ABLIC Inc |
RoHS: Compliant
|
0 |
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