Analog Devices AD9209 four-channel 12-bit 4GSPS ADC

     Analog Devices AD9209 four-channel 12-bit 4GSPS analog-to-digital converter (ADC) features on-chip broadband buffer with overload protection. The device supports applications that can directly sample broadband signals up to 8GHz. An on-chip, low phase noise, PLL clock synthesizer can be provided to generate an ADC sampling clock. This feature simplifies the distribution of printed circuit boards (PCB) for high frequency clock signals. A clock output buffer can be provided to transmit ADC sampling clocks to other devices.

     The AD9209 4-channel ADC kernel has a code error rate (CER) better than 1×10−20. Provides low latency, digital monitoring and rapid detection for AGC purposes. A flexible 192 tap programmable finite Impulse response filter (PFIR) is available for digital filtering and/or equalization. Decimal delay blocks and programmable integers support compensation for analog delay mismatch.

     The digital Signal processing (DSP) module consists of four fine DDCS and two coarse digital frequency reduction converters (DDCS) (each pair of ADCs). Each ADC can operate with one or two main DDC stages, while supporting multi-band applications. Four additional fine DDC stages are available, supporting up to four frequency bands (per ADC). The 48-bit numerically controlled oscillator (NCO) associated with each DDC supports fast frequency hopping (FFH) while keeping in sync with up to 16 unique frequency assignments via common input and serial port interface (SPI) or Output (GPIOx) pins.

     Analog Devices AD9209 supports configuring one or two JTx links for JESD204B or JESD204C subclass operations to provide a different data path configuration for each ADC. Multiple device synchronization is supported with SYSREF± input pins.