Challenges and solutions for the semiconductor industry in the era of artificial Intelligence-driven intelligence

In this era of ubiquitous intelligence powered by artificial intelligence, our wafer and system customers are under unprecedented pressure to deliver the ever-increasing computational performance needed to train AI systems based on large language models (LLMS), as demand doubles every six months. In addition, they face the challenge of achieving sustainable computing - exponential growth in performance while increasing power efficiency. The traditional reliance on Moore's Law is no longer sufficient, as recent node conversions no longer consistently deliver the expected double performance, power, and area improvements.

As we move toward trillion-transistor systems by the end of the century, these challenges are exacerbated by expected semiconductor labor shortages and increased design complexity. Contrary to these trends, however, the pace of semiconductor innovation is accelerating.

Take a look at the latest announcements from AMD and NVIDIA at Computex. Not only did these major chipmakers show off new AI processors with hundreds of billions of transistors and faster, denser memory that will be used in leading-edge manufacturing nodes, they also showed off an accelerating pace of innovation. Despite the increasing complexity, the product updates cycle for new AI processors has been reduced from 18–24 months to 12 months.

Trends in artificial intelligence chip design

How is such a fast-paced annual update of the new AI processor possible? Synopsys is at the heart of several key factors. Let's take a closer look.

Ai-driven EDA: EDA software is a key enabler at every step of the R&D process, from architecture and validation to implementation and manufacturing. Over the past decade, Synopsys has achieved increasing levels of automation across the EDA stack through a unique hyper-converged approach. Today, we are pioneering the integration of artificial intelligence across the EDA stack to increasingly automate the design process, driving step-wise improvements in engineering productivity and wafer quality. Our Synopsys.ai™ suite includes AI-driven optimization, data analytics, and LLM-based productive AI with collaborative capabilities, including expert tool guidance and data generation, to significantly reduce turnaround times for EDA processes from digital, analog, and 3D design to validation and testing.

Accelerated Computing: In addition to incorporating AI capabilities into our products, we are also helping customers save significant time by rewriting our tools to take advantage of accelerated computing. Using GPU and CPU + GPU architectures to support compute-intensive EDA workloads can achieve significant (10x to 15x) run-time gains in design, functional verification, circuit simulation, computational lithography, and more. Accelerated computing is particularly attractive for customers dealing with large analog circuits, such as memory.

Silicon-validated IP: Our customers have also achieved significant productivity gains thanks to the availability of trusted, silicon-validated IP. By combining Synopsys' broad portfolio of high-quality IP products, customers can focus limited engineering resources on differentiating features that streamline the design process while integrating the latest industry standards. A recent example is our new, complete solution Synopsys IP for PCIe 7.0, which addresses the critical need for increased bandwidth and reduced latency as AI workloads bring massive data transfer demands to modern data centers.

Multi-chip design: The evolution from single-chip design to modular, chip-based design allows for the rapid integration of new and advanced functions in trillion-transistor systems. Synopsys is driving the industry's transition from monolithic SoCs to multi-chip designs, offering comprehensive and scalable EDA and IP solutions from silicon to system, including new AI-driven 3D design space optimization to maximize result quality and enable fast heterogeneous integration.