Differential frequency buffers to meet the need for higher design margin in terabit communications

     Diodes introduces PI6C59xxxxx series differential frequency buffers. The family supports Ethernet network speeds of up to 400Gbit/s, making it ideal for high-performance applications such as data centers and 5G base stations. The PI6C59xxxxx series is available in a TQFN package with 16 to 48 pin digits.

     The growing demand for network speeds ranging from 25Gbit/s to up to 400Gbit/s, known as terabit Ethernet or TbE, is putting pressure on switchers and router designers to maintain signal integrity in more challenging environments. The PI6C59xxxxx series differential frequency buffers provide better signal margin while enhancing drive for all frequencies and data signals used in high-speed communications. The range covers a wide range of speed classes and technologies, as well as input and output combinations.

     The PI6C59xxxxx family of devices is designed to increase fan-out of frequency sources and improve frequency and/or data distribution in communications applications operating in the 1.5GHz to 6GHz range. This covers a wide range of 25G, 40G, 56G, 100G and 400GbE applications that require low jitter and fast rise/fall times. The ultra-low additional jitter of approximately 10fs in this family of devices provides a better jitter margin, thereby maintaining overall accuracy. All units are available in TQFN package form factor and provide good thermal conductivity in a small size. This is increasingly important for data center and base station applications, as vendors need to improve power density, performance, bandwidth and add functionality.

     The PI6C59xxxxx family includes 13 device versions that cover all major signaling technologies used in high-speed networks, including CML (current mode logic), LVDS (Low voltage differential signaling), LVPECL (Low voltage positive emitter Coupled logic), SSTL (Residual Continuous Termination logic), and LVPECL (Low voltage Positive Emitter Coupled logic). And LVCMOS. The configuration includes 2, 4, 12, and 16 outputs of the fan-out buffer and data/frequency buffer.