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Intel introduces the first FPGA chip with PCIe5.0 and CXL capabilities

Jun 9 2023 2023-06 Power Intel
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Intel has announced the release of the first Agilex 7 FPGA R-Tile, which supports PCIe 5.0 and CXL 2.0 capabilities and is now in volume delivery. It uses an R-Tile design and is the only FPGA to support these interfaces with hard intellectual property.

     Intel has announced the release of the first Agilex 7 FPGA R-Tile, which supports PCIe 5.0 and CXL 2.0 capabilities and is now in volume delivery. It uses an R-Tile design and is the only FPGA to support these interfaces with hard intellectual property.

 

     Shannon Poulin, corporate vice president and general manager of the Programmable Solutions Group at Intel, said: "We provide the cutting-edge technology, scalability and customisation our customers need to not only effectively manage their current workloads, but also adapt functionality as demand evolves. Our Agilex products deliver programmable innovation with the speed, power and functionality our customers demand, while providing flexibility and resilience for the future. Customers can take advantage of R-Tile, along with PCIe 5.0 and CXL, to accelerate software and data analysis, reducing processing time from hours to minutes. "

 

     With Agilex 7 and R-Tile designs, customers can seamlessly connect FPgas with products such as Intel's fourth-generation Xeon scalable processors. Agilex 7's configurable and scalable architecture enables customers to quickly deploy customized technologies tailored to their specific needs, reducing overall design costs, and speeding up development processes and execution for optimal data center performance.

 

     PCIe 5.0 is an I/O data transfer standard, meaning a transfer speed of up to 32GT/s. CXL 2.0 is a general-purpose computer language that can support different types of data and operations, enabling different devices such as cpus, Gpus, memory, and accelerators to communicate faster and more efficiently.

 

     In addition, the introduction of the new heterogeneous R-Tile core technology also makes the chip the only FPGA family certified to the full PCI-SIG 5.0x16 data rate. The interconnect technology between the FPGA chip and the transceiver core is based on Intel's embedded multi-chip Interconnect bridge (EMIB) packaging technology. At the same time, this is also another product that has been released since Intel's acquisition of FPGA company Altera to benchmark AMD FPGA chips.

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