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Microchip introduces new dual-core and single-core ds PIC digital signal controllers

Jul 25 2019 2019-07 Connectors Microchip Technology
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As the development of high-end embedded control applications becomes more complex, system developers need more flexible options to provide system scalability. To this end, Microchip Technology announced the introduction of a new dual-core and single-core dsPIC33C digital Signal controller (DSC) to meet changing application needs, providing more options in memory, operating temperature and functional safety.

     As the development of high-end embedded control applications becomes more complex, system developers need more flexible options to provide system scalability. To this end, Microchip Technology announced the introduction of a new dual-core and single-core dsPIC33C digital Signal controller (DSC) to meet changing application needs, providing more options in memory, operating temperature and functional safety.

 

     Microchip's new dsPIC33CH512MP508 dual-core DSC provides support for applications with greater program memory requirements. The dsPIC33CK64MP105 single-core DSC provides a low-cost option for applications requiring smaller memory and volume. Developers can easily switch between these new devices because the pins of the dsPIC33CH and dsPIC33CK series are fully compatible.

 

     The dsPIC33CH512MP508 (MP5) series extends the recently launched dsPIC33CH by increasing the memory from 128 KB to 512 KB and tripling the program RAM (random access memory) storage capacity from 24 KB to 72 KB. The expanded devices can support large applications that require multiple software stacks or larger program memory, such as in-vehicle and wireless charging applications. In-car applications require more memory to support AUTOSAR software, MCAL drives, and CAN FD peripherals.

 

     Wireless charging in in-vehicle applications requires additional software protocol stacks to support the Qi protocol and near Field communication (NFC), which in turn requires more program storage space. Real-time firmware updates using real-time updates are critical for high availability systems, but at the same time, the overall memory requirements are doubled. In a dual-core device, one of the cores can be designed as the primary core and the other as the slave core.

 

     The slave core is used to execute time-sensitive, dedicated control code, while the master core is used to run functions such as user interfaces, system monitoring, and communications. For example, dual-core helps divide the software protocol stack for parallel execution of the Qi protocol and other functions, including NFC, to optimize the performance of in-vehicle wireless charging applications.

 

     The dsPIC33CK64MP105 (MP1) series is an extension of the recently launched dsPIC33CK series, where the low-cost model is suitable for smaller memory and package applications and is available in up to 64 KB of flash memory and 28 to 48 pin packages with a minimum package size of 4 mm x 4 mm. This compact device provides the ideal combination of features for in-vehicle sensors, motor control, high-density DC-DC applications, or stand-alone Qi transmitters. Single-core and dual-core dsPIC33C devices provide fast determination performance for time-sensitive control applications by extending the context select register, reducing interrupt latency and speeding up instruction execution for mathematically intensive algorithms.

 

     Joe Thomsen, vice president of Microchip's MCU16 business unit, said: "With the 76 dsPIC33C single - and dual-core devices in the family, customers can more easily adapt to changes in their memory, I/O, performance or budget needs with common tools, common peripherals and package compatibility. In addition, dual-core devices make software integration easier for various software development teams, allowing them to focus on control algorithms without the distraction of communication and routine business code."

 

     All devices in the dsPIC33C family include a complete set of functional safety hardware that simplifies ASIL-B and ASIL-C certification in safety-critical applications. Functional safety features include multiple redundant clock sources, fail-safe clock Monitor (FSCM), IO port read back, flash error-correcting code (ECC), RAM built-in self-check (BIST), write protection, analog peripheral redundancy, and more. With a powerful set of CAN-FD peripherals and new support for operating at 150°C, these devices are ideal for applications in extreme environments such as the front hood of the vehicle.

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