
STMicroelectronics and CMP (Circuits Multi Projets) announce that through CMP's silicon brokerage service, To give universities, research laboratories and design companies the opportunity to use ST's BCD8sP smart power chip manufacturing technology platform.
This is the first time ST has opened BCD technology to third-party vendors, reflecting the growing importance of the power integration concept in enhancing the performance of computers, consumer electronics, industrial applications and more. "We look forward to CMP helping us identify and support more innovative projects, and to building long-term relationships with talented designers and research institutions," said Claudio Diazzi, vice president, Front End Manufacturing and Technology Development and general manager, Intelligent Power Technologies, ST Sensors, Power and Automotive Products.
As the most advanced technology in ST's BCD (bipolari-CMOS-DMOS) technology, the BCD8sP manufacturing process integrates analog circuits, logic circuits and high voltage power devices. Manufacture monolithic ics that meet the needs of complex power-conversion and control applications. This manufacturing process allows ST to outperform competitors in important applications such as Hard Disk Drive (HDD) controllers, motor controllers and power management chips for smartphones, tablets and servers.
CMP's introduction of ST's BCD8sP manufacturing process into the service project builds on previous successful collaborations between the two parties. The CMP gives universities and design firms the opportunity to use state-of-the-art and traditional CMOS technologies, including 28nm, 65nm and 130nm manufacturing processes. CMP customers also have access to ST's 28nm FD-SOI, 130nm SOI (Silicon on Insulator) and 130nm SiGe manufacturing processes.
Jean-Christophe Crebier, Director of CMP, said: "We have now added ST's world-class BCD manufacturing technology to our service offering, enabling us to provide even more robust support services for more advanced smart power design projects. Many of the world's top universities are already benefiting from this collaboration between CMP and ST. There are approximately 300 design projects using ST's 90nm manufacturing process, more than 350 design projects using the 65nm traditional CMOS manufacturing process, and more than 50 prototypes using the 28nm FD-SOI manufacturing process."
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