STMicroelectronics introduces the new MasterGaN4 device for energy-efficient power conversion of up to 200 watts

     STMicroelectronics' MasterGaN4 power package integrates two symmetrical 225mΩ RDS(on), 650V gallium nitride (GaN) power transistors, as well as optimized gate drivers and circuit protection to simplify the design of energy-efficient power conversion applications up to 200W.

     As the latest addition to the STMicroelectronics MasterGaN family, MasterGaN4 solves complex gate control and circuit layout challenges and simplifies the application design of wideband gap GaN power semiconductors. The MasterGaN4 has an input tolerance voltage of 3.3V-15V and can be directly connected to controllers, such as Hall effect sensors or CMOS chips such as microcontrollers, DSP processors, FPGA programmable devices.

     GaN transistor switches have excellent performance, higher operating frequency, higher energy efficiency, and less heat dissipation, and designers can choose smaller magnetic components and radiators, and design smaller and lighter power supplies, chargers, and adapters. MasterGaN4 is well suited for symmetric half-bridge topologies as well as soft switching topologies, such as active clamp flyback and active clamp forward converters.

     The wide supply voltage of 4.75V-9.5V facilitates connection of the MasterGaN4 to the existing supply rail. Built-in protection features include gate driver interlock, low and low side undervoltage lock (UVLO), and overheat protection to further simplify application design. There's also a dedicated turn-off pin.

     As part of this product launch, ST is also introducing a Master Master 4 prototype development board (EVALMASTERGAN4). This evaluation board offers full functionality to drive the MasterGaN4 with a single or complementary signal, as well as an adjustable dead-time generator. Users have the flexibility to apply a separate input signal or PWM signal, plug in an external bootstrap diode, isolate the logic device and gate driver power rail, and design a peak current mode topology using a low-side current sampling resistor.