Teledyne SP Devices introduces a 12-bit digitizer with a continuous data transfer rate of 7 GB/s

     Teledyne SP Devices, a business unit of Teledyne Technologies, announced the ADQ32 and ADQ33, fourth-generation modular data acquisition boards optimized for high-throughput applications. With the combination of on-board open field programmable gate arrays (FPgas) and high-speed data streaming, the ADQ32 and ADQ33 are ideal for even the most computationally demanding applications.

     The ADQ32 dual-channel 12-bit digital converter supports synchronous sampling at 2.5 Gb/s per channel, while the ADQ33 supports synchronous sampling at 1 GS/s per channel and features an open Xilinx Kintex Ultrascale KU040 field programmable gate array (FPGA). Optimized for high-volume applications, both digitizers are suitable for original equipment manufacturers (Oems) to integrate in areas such as scanning source optical coherence Tomography (SS-OCT), time-of-flight mass spectrometry (ToF-MS) and distributed fiber sensing (DOFS). The ADQ33 is not subject to export controls and therefore does not require any license.

     Users can perform customized dedicated digital signal processing (DSP) in real-time in an onboard FPGA to characterize signals and extract valuable information. It can also be used to perform data reduction so that the output rate matches the 7 G/s continuous transmission capacity of the PCI Express interface. The data can then be post-processed on the main PC's central processing unit (CPU) or transferred point-to-point to the graphics processing unit (GPU).

     This architecture provides a great deal of flexibility, allowing designers to use the most appropriate type of processing resources for the tasks they delegate. Examples of dedicated DSPS include fast Fourier Transform (FFT) and K-space remapping for SS-OCT, and waveform averaging and zero suppression for ToF MS.

     In addition to high flow rates and computational flexibility, the ADQ32 offers excellent simulation performance, including significant bits (ENOB), spury-free dynamic range (SFDR), and more. Hardware triggering, internal/external clock selection, and universal input/Output (GPIO) simplify system-level integration.