Texas Instruments LMK5B33216 Network synchronizer and jitter cleaner

     Texas Instruments LMK5B33216 Network Synchronizer and jitter eliminator are designed to meet the rigorous requirements of Ethernet-based networking applications with timing accuracy. 5ns (class D). The network synchronizer integrates three DPLLS to provide interruption-free switching. It also has jitter attenuation, programmable loop bandwidth, and no external loop filter.

     This feature maximizes flexibility and ease of use. Each DPLL phase locks the paired APLL to the reference input. APLL3 uses TI's proprietary bulk acoustic (BAW) technology to deliver ultra-high performance PLL. It generates a 312.5MHz output clock with an RMS jitter of 42fs (typical value) /60fs (maximum value) regardless of the DPLL benchmark input frequency and jitter characteristics. APLL2 and APLL1 provide options for second or third frequencies and/or synchronization domains.

     The reference validation circuit monitors the DPLL reference clock and performs an interrupt-free switch between them when a switch event is detected. Zero latency and phase building can be enabled to control the phase relationship from input to output. The device can be fully programmed through the I2C or SPI interface. Onboard EEPROM can be used to customize the system boot clock. Texas Instruments LMK5B33216 also has a factory default ROM profile as a rollback option.