Xilinx has added a new SmartLynq+ module for Versal ACAP

Xilinx has added a new product to its portfolio of programming, debugging, and tracking modules. The SmartLynq+ module is a high-speed debug and trace module designed primarily for use with the Versal platform, which greatly improves configuration and trace speed. The SmartLynq+ module provides up to 28 times faster Linux download times than the SmartLynq data cable via the High-speed Debug Port (HSDP). For tracking capture, the SmartLynq+ module is capable of running at speeds of up to 10Gb/s via HSDP. This is 100 times faster than standard JTAG! Faster iterations and repeated downloads can increase development productivity and reduce design cycles. This means that you no longer need to spend valuable time debugging, but can focus on the launch of a Versal-based solution.

ACAP is a highly integrated, multi-core heterogeneous computing platform that can be changed at both the hardware and software levels to dynamically adapt to a wide range of applications and workloads in the data center, automotive, 5G wireless, wired, and defense sectors. Versal ACAP's architecture is built to support software programmability and has a highly flexible network on chip (NoC) with transmission rates of up to several megabits per second. NoC seamlessly integrates all engines and key interfaces, making the platform's resources available at startup and easy to program for software developers, data scientists, and hardware developers alike. Through a range of tools, software, libraries, IP, middleware, and firmware, ACAP enables users to develop a variety of customized accelerated computing solutions through industry-standard design processes at any time.

The SmartLynq+ module offers the following advantages:

● Super fast download speed to maximize development productivity for faster iterations

● High speed tracking with enhanced visibility, execution history of up to 14GB of tracking memory

● Full visibility of heterogeneous architectures, in-depth debugging of hard IP and intelligent engines (AI and DSP), adaptive engines, and scalar engines in Versal ACAP

● Debugging of all subsystems related to time

● Flexible intelligent debugging platform, with intelligent filtering and software programmable built-in debugger and other functions

● A shareable debugging platform with a unified view for remote multi-user environments

● SmartLynq+ modules are packed with breakthrough performance and intelligence features, making them the smartest and most flexible debugging products on the market.

The main functions and interfaces of the SmartLynq+ module:

● Host side USB 3.0 connector, Gigabit Ethernet connection to the network for remote access

● High Speed Debug Port (HSDP) for faster programming, debugging, and high-speed serial tracing

●JTAG (PC4 head) offers speeds up to 100MHz

● 8-bit universal I/O (GPIO) port for various basic input/output operations on the target board

● Mictor-38 connector for parallel tracking

Accessories included with the SmartLynq+ module include power, USB and Ethernet cables, micro-SD cards, JTAG and GPIO wire cables. Users download the latest SD card image, follow the steps to set up the module, and then develop with Versal ACAP.